ECS X58B-A3 SLI (V1.0) Bulk Specifications download pdf (Page 47)

Using BIOS

* When users disable the item Configure DRAM Timing by SPD, the following

picture will show.

M.I.B. (MB Intelligent BIOS)

Help Item

CPU Current Voltage 1.21250V

CPU Voltage Disabled

NB Vcore 1.120 V

IOH Voltage Disabled

CPU VTT 1.184 V

CPU VTT Voltage Disabled

VDIMM 1.456 V

DIMM Voltage Disabled

SB Vcore 1.232 V

SB Voltage Disabled

Current Memory Frequency 1066 Mhz

DRAM Frequency Auto

Configure DRAM Timing by SPD Disabled

DRAM tCL 3

DRAM tRAS 9

DRAM tRP 3

DRAM tRCD 3

DRAM tRFC 15

F10: Save ESC: Exit+/-/: Value

Enter : Select

F9: Optimized Defaults

F1:General Help

: Move

mnlk

DRAM Frequency (Auto)

This item allows users to adjust the DRAM frequency.

Configure DRAM Timing by SPD (Enabled)

When this item is set to enable, the DDR timing is configured using SPD. SPD (Serial

Presence Detect) is located on the memory modules, BIOS reads information coded

in SPD during system boot up.

SPD eXtreme Memory Profile (Standard)

Use this item to select the SPD eXtreme Memory Profile. If the item is set to

Standard, the memory will work under the standard mode. If the item is set to

Profile 1/2, the memory is capable to reach 1600 MHz.

DIMM Voltage (Disabled)

This item allows users to adjust the DIMM voltage.

Users can adjust the values according to those labelled on the DIMM

specification to improve the efficiency of the system. In principle, you need

set the values of tCL (CAS Latency Time), tRAS (Active to Precharge

Delay), tRP (RAS Precharge Time) and tRCD (RAS to CAS Delay).

Press <Esc> to return to the main menu setting page.

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ECS X58B-A3 SLI (V1.0) Bulk Specifications Page 47

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